Pulse width modulation (“PWM”) is a common circuit technique where the width of a pulse in a periodic signal is varied or “modulated” to an extent that depends on the signal needed to control a connected device. PWM is often used to control the supply of electrical power to a device and may be used as a voltage mode controller in power control systems. Using PWM, which switches the power on and off very rapidly, a DC voltage may be efficiently and accurately converted to a lower DC voltage. Through continually adjusting the pulse width, as necessary, the lower DC voltage level can be maintained.
As an example, the pulse from the PWM circuit may be used to control the switch in a DC to DC converter circuit, such as a buck converter in a closed loop voltage mode control system. The width of the PWM pulse determines how long the power from a power source is applied to the converter circuit through the switch. By using an LC filter between the switch and the output, the applied pulsating input is arranged into a relatively smooth DC output voltage and current. Typically, the output voltage and current are then applied to the load with only a small ripple. A PWM power control system may be achieved by using a semiconductor switch where the discrete on/off states of the modulation are used to control the state of the switch which correspondingly controls the voltage across or current through the load. These semiconductor switches may take the form of one or more pass transistors. By using such a configuration, PWM can be used to control the total amount of power delivered to a load. Enhanced accuracy of the voltage level can be obtained and, for portable devices, the battery life is extended since it is applied only in a switched or pulsed manner.
In a conventional circuit using PWM, a ramp signal (Vramp) and a feedback error voltage signal (Verr) are input to a comparator. The Vramp signal may be a sawtooth waveform although it can take other forms. For the feedback error voltage signal Verr, an error amplifier is used to compare the output voltage signal with a reference voltage (e.g., 0.75 volts), to produce the voltage error signal Verr. For example, a sample of the output voltage may be taken and subtracted from a reference voltage to establish a small error signal Verr. This error signal is compared to the ramp signal Vramp. The output of the PWM comparator may then be input to a latch such as an S-R flip flop as the R (reset) input. A periodic clock signal may be the S (set) input. The periodic clock signal may be generated using an internal fixed-frequency system clock generated by a clock circuit, for example. The output of the S-R flip flop may be used as the PWM output signal, or additional processing, such as noise suppression, may be performed. When the circuit output voltage changes, Verr also changes, which causes the comparator threshold to change, and the pulse width of the PWM output signal also changes.
By adjusting the duty cycle of the signal (modulating the width of the pulse), the average power can be varied based on the time fraction that it is “on.” Modulation of the duty cycle for a power source will control the amount of power sent to the load. With PWM control, the frequency is held constant while the width of each pulse is varied to form a fixed-frequency, variable-duty cycle operation.
Operating at a higher switching frequency can provide benefits such as improved performance in a closed-loop circuit. Higher switching frequencies may require smaller duty cycles with shorter pulse widths. A conventional PWM signal generation circuit, however, may be limited in how small a pulse width, and duty cycle, can be achieved. As the pulse width decreases, a point is reached where the PWM comparator may not have adequate overdrive to produce a PWM signal below a minimum pulse width. A traditional voltage mode controller may have a minimum pulse width of about 80 nanoseconds.
For a buck converter, the minimum pulse width is the required on-time for a control MOSFET to regulate the output voltage. The on-time (Ton) is defined by the duty cycle (D) and operating frequency (Fs), where Ton=D/Fs. Similarly, the duty cycle (D) can be defined as the on-time (Ton) multiplied by the operating frequency (Fs). For power control applications, the duty cycle may be defined as the output voltage (Vo) divided by the input voltage (Vi), or D=Vo/Vi. For example, where the required voltage for an electrical component is 0.75 volts, and the power supply voltage for the buck converter is 13.2 volts, a duty cycle of 0.075/13.2 or about 5.7% is required. At a frequency of 600 KHz, the required on-time is about 95 nanoseconds. At a frequency Fs of 1.5 MHz, however, the required on-time is about 38 nanoseconds, which is well below the minimum pulse width of about 80 nanoseconds discussed earlier for a conventional voltage mode controller.
In certain cases, a zero percent duty cycle may be desired. For example, soft starting a motor drive (to reduce stresses on the drive components and/or load systems powered by the drive) may require a zero percent duty cycle at start-up, and progressively increasing to larger duty cycles. There may be other situations where programming a zero duty cycle may be desirable. In prior approaches, a diode circuit was often used to add a dc voltage offset to the ramp signal to achieve a zero percent duty cycle. One drawback of using a diode circuit for this purpose is the fact that the diode voltage decreases with temperature. Furthermore, diodes may increase noise and noise susceptibility.